technical data ds-108 rev k crystal clock oscillator saronix 3.3 & 5v, hcmos, acmos, ttl sta / stt series frequency range: full size: half size: actual size description a crystal controlled, low current, low jitter and high frequency oscillator with precise rise and fall times demanded in high performance networking, telecom and processor applications. the tri-state function enables the output to go high impedance. available in a 14 or an 8 pin dip compatible, resistance welded, all metal case. pin 7 (or pin 4) is grounded to case to reduce emi. see photo above for new, full size metal package with a true smd adapter. for this package option select option s in part number builder. stt 5v sta 5v sta 3.3v 250khz - 135mhz 125khz - 135mhz 125khz - 125mhz 250khz - 135mhz 500khz - 135mhz 500khz - 125mhz frequency stability: 20, 25, 50 or 100 ppm over all conditions: calibration tolerance, operating temperature, rated input voltage change, load change, aging*, shock and vibration applications & features fibre channel gigabit ethernet high performance processors true smd dil14 version available high drive hcmos, acmos or ttl capability tri-state output precise rise/fall times reduced emi circuitry short circuit protected output ? temperature range: operating: storage: 0 to +70c or -40 to +85c -55 to +125c supply voltage: recommended operating: +5v 10% or 3.3v 10% (sta only) supply current: 50ma typ, 70ma max @ 5v or 30ma typ, 45ma max @ 3.3v output drive: see part numbering guide see part numbering guide 10% v dd or 0.5v max 90% v dd or 2.5vmin 50 ? acmos, 95 ? acmos @ 3.3v, 50ma sink & source @ ttl 8ps max symmetry: rise & fall times: logic 0: logic 1: load: period jitter rms: mechanical: mil-std-883, method 2002, condition b mil-std-883, method 2003 mil-std-202, method 211, conditions b2 mil-std-883, method 2007, condition a mil-std-202, method 215 mil-std-202, method 210, condition a, b or c shock: solderability: terminal strength: vibration: solvent resistance: resistance to soldering heat: environmental: gross leak test: fine leak test: thermal shock: moisture resistance: mil-std-883, method 1014, condition c mil-std-883, method 1014, condition a2 mil-std-883, method 1011, conditions a mil-std-883, method 1004 part numbering guide sta a 9 9 b 3 - 90.0000 * 1 year @ +40c acmos / ttl * r/f times are standard with given frequency ranges, non-standard r/f times available on some models, please contact saronix symmetry 0 = 40/60% max, 0 to +70c a = 45/55% max, 0 to +70c stt to 80 mhz max only sta 3.3v to 109.9999 mhz max only 2 = 40/60% max, -40 to +85c sta 3.3v to 109.9999 mhz max only standard * rise/fall times 1 = stt 4.0ns max 250khz to 15 mhz full, to 35 mhz ? size 2 = stt 2.0ns max from 15+ mhz full, 35+ mhz ? size to 60 mhz 3 = stt 1.0ns max from 60+ mhz to 135 mhz 7 = sta 5.5ns max, 125khz to 15 mhz full, 500khz to 35 mhz ? size 8 = sta 3.5ns max from 15+ mhz full, 35+ mhz ? size to 60 mhz 9 = sta 2ns max from 60+ mhz to 135 mhz(5v), to 125 mhz(3.3v) series sta = acmos compatible, 3.3 or 5v stt = ttl compatible, 5v only frequency (mhz) stability tolerance aa = 20ppm, 80mhz max, 0 to +70c only a = 25ppm, 80mhz max, 0 to +70c only b = 50ppm c = 100ppm supply blank = 5v (sta or stt, 135mhz max) 3 = 3.3v (sta only, 125mhz max) package size / style 0 = full size 9 = ? size k = full size, gull wing j = ? size, gull wing n = ? size, gull wing, spanked leads s = full size, true smd adapter example pn: stt220c - 60.0000 saronix 141 jefferson drive menlo park, ca 94025 usa 650-470-7700 800-227-8974 fax 650-462-9894
all specifications are subject to change without notice. crystal clock oscillator technical data ds-108 rev k saronix 3.3 & 5v, hcmos, acmos, ttl sta / stt series package details 21.0 .825 max 5.08 .200 .46.08 .018.003 15.24.13 .600.005 7.75 .305 (4) glass insulators pin 1 tri-state control pin 7 gnd pin 14 +5 or +3.3 vdc pin 8 output full size package 0.9 .036 max 13.0 .510 max denotes pin 1 saronix xtal osc max marking format ** includes date code, frequency & part number half size package 5.08 .200 max 13.0 .510 max 0.9 .036 max .46.08 .018.003 7.62.20 .300.008 glass insulators pin 5 output pin 1 tri-state pin 4 gnd 120 120 120 13.0 .510 max 7.62.20 .300.008 1.5 .059 denotes pin 1 saronix marking format ** includes date code, frequency & part number scale: none (dimensions in ) mm inches ** exact location of items may vary output waveform tri-state logic table pin 1 input logic 1 or nc logic 0 or gnd output standard logic oscillation high impedance required input levels on pin 1: logic 1 = 2.2v min logic 0 = 0.8v max 6.35.51 .250.020 6.35.51 .250.020 t r t f t r t f ttl v dd gnd symmetry symmetry logic 0 logic 1 80% v dd 50% v dd 20% v dd acmos 1.5 vdc 2.5 vdc 0.5 vdc test circuit power supply pin 7 (4) power supply acmos 95 ? load 0.01 f 95 ? test point v cc oscillator pin 8 (5) pin 7 (4) pin 14 (8) out gnd pin 1 ( 1 ) * .01 f tri-state input (current limited on fixture) * ( ) indicates pin numbers for half-size package 95 ? ? ? ? ? acmos test circuit (3.3v operation) ma m v m v cc oscillator pin 8 (5) pin 14 (8) .01 f out gnd pin 1 ( 1 ) * acmos 50 ? load 0.01 f 56 ? test point tri-state input (current limited on fixture) * ( ) indicates pin numbers for half-size package 50 ? ? ? ? ? acmos test circuit (5v operation) ma m v m max saronix 141 jefferson drive ? menlo park, ca 94025 usa 650-470-7700 800-227-8974 fax 650-462-9894 pin 14 +5 or +3.3 vdc
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